JOB POSTING INFORMATION
Position Type:	Professional Experience Year Co-op (PEY Co-op: 12-16 months)
Job Title:	Software Engineering Intern: Architecture, Frameworks, and Infrastructure
Job Location:	Toronto, ON
Job Location Type:	On-Site
If working on site, can you provide a copy of your COVID-19 safety protocols?:	No
Number of Positions:	Multiple
Salary:	$0.00 hourly for 0.0 hours per week
Start Date:	05/06/2024
End Date:	08/22/2025
Job Function:	Engineering
Job Description:	The Microchip FPGA Software Engineering team delivers a comprehensive software suite for designing Microchip's FPGAs and managing the entire design flow from entry, to synthesis, through place-and-route, timing, power analysis, simulation, debug and programming.  Within the Software organization, and Application Frameworks and Infrastructure group is responsible for developing data representations of the customer's FPGA design through its various stages of compilation - from RTL to synthesized gates, placement and routing - as well as the mechanisms to analyze that information.  We are also responsible for developing the overall Integrated Design Environment (IDE) used to create the FPGA design, define its constraints and manage the entire Electronic Design Automation (EDA) flow.  Microchip's FPGA IDE software is distributed commercially to a wide range of customers.  The Application Frameworks and Infrastructure group is looking for a highly motivated individual to be part of the team to support the next generation FPGA architecture for Microchip's FPGAs. In that role, you will be part of the team working on developing the software models of the FPGA architecture and the RTL-to-bits flow.  Responsibilities:  - Develop scripts and automation to process architecture data files  - Develop software for FPGA gate level netlist compilation flows for the new architecture, including Design Rule Checks (DRCs) and structural transformations  - Create unit tests to validate all DRCs and netlist transformations
Job Requirements:	Minimum Qualifications:  - Good understanding of logic design  - Good knowledge and ability in C++, as well as understanding of data structures representing gate level netlists  Preferred Qualifications:  - Basic understanding of FPGA architectures  - Effective communicator and creative problem-solver  - Ability to work in a fast-paced, demanding, dynamic environment  - Experience with shell scripting languages (Perl, Python, Bash, TCL)  - Experience with software development in a Linux and Windows environment
Preferred Disciplines:	Computer Engineering Computer Science Electrical Engineering Engineering Science (Electrical and Computer)
All Co-op programs:	No
Targeted Co-op Programs:	Targeted Programs Professional Experience Year Co-op (12 - 16 months)

APPLICATION INFORMATION
Application Deadline:	Nov 15, 2023 11:59 PM
Application Receipt Procedure:	Online via system
U of T Job Coordinator:	Ryan Hand

ORGANIZATION INFORMATION
Organization:	Microchip Technology
Division:	FPGA R&D Software Engineering
Website:	www.microchip.com

ADDITIONAL INFORMATION
Length of Workterm:	FIXED PEY Co-op: 16 months