JOB POSTING INFORMATION
Position Type:	Professional Experience Year Co-op (PEY Co-op: 12-16 months)
Job Title:	Digital Design Engineering Intern
Job Location:	Main Office (Markham, ON)
Job Location Type:	Flexible
If working on site, can you provide a copy of your COVID-19 safety protocols?:	Yes
Number of Positions:	4
Salary:	$27.00 hourly for 40.0 hours per week
Start Date:	05/01/2024
End Date:	09/01/2025
Job Function:	Engineering
Job Description:	Responsibilities Implementation of PHY and Testchip RTL logic in Verilog Functional modeling of PHY custom circuits in Verilog Participation in testplan development Testchip and PHY bring-up flow development C / Python test development Developing methodology and automation processes
Job Requirements:	Qualifications Currently in the process of obtaining a Bachelor’s, Master’s, or Doctorate in Electrical Engineering, Computer Engineering, or related field Good grasp of electrical circuits concepts in both transistor and logic gate level Excellent communication skills and problem-solving skills Team player and willingness to learn Programming, HDL, and scripting languages (C/C++, Verilog, Perl, Python, Tcl, etc) is an asset Knowledge of RTL design and high-speed memory (GDDR/LPDDR/HBM) interfaces is a plus
Preferred Disciplines:	Computer Engineering Electrical Engineering
All Co-op programs:	No
Targeted Co-op Programs:	Targeted Programs Professional Experience Year Co-op (12 - 16 months)

APPLICATION INFORMATION
Application Deadline:	Dec 4, 2023 11:59 PM
Application Receipt Procedure:	Online via system
Additional Application Information:	Please submit your resume, cover letter as well as unofficial transcript for this application. Thank you and we look forward to hearing from you!
U of T Job Coordinator:	Ryan Hand

ORGANIZATION INFORMATION
Organization:	The Six Semiconductor
Division:	Main Office
Website:	https://www.thesixsemi.com/

ADDITIONAL INFORMATION
Length of Workterm:	FLEXIBLE PEY Co-op: 12-16 months (range)